Report: Intel’s 8th gen chips will still use 14nm, will arrive earlier than expected

By Joel Hruska

Last year, Intel announced that it would abandon the Tick-Tock model that had served it for nearly a decade and switch to something called PAO — Process, Architecture, Optimization. The point of switching from a two-step process to a three-step system was to give Intel extra time to roll out its next-generation process nodes, while simultaneously affording more opportunity to eke maximum gains out of each current node. Now, new information suggests Intel may have a product plan that tears up PAO (or at least complicates it) going forward.

Analyst Ashraf Eassa claims to have confirmed with Intel that upcoming 8th generation Core processors will use an updated/enhanced variant of 14nm technology yet again — call it 14nm++. Intel was able to squeeze some gains out of Kaby Lake in this fashion compared with Skylake, but they weren’t huge leaps.

Image by Anandtech

A slide showed by Intel at a recent speech on the future of its data center business confirms this by stating “Data center first to next process node,” Anandtech notes. It also makes the point that enterprise and government spending are only worth a 2% increase in CAGR (Compound Annual Growth Rate) while the cloud services business is expected to grow by 15% from 2017-2021.
Still, at first glance, this may seem a foolish strategy. After all, AMD’s Ryzen will debut in the imminent future, and one might reasonably conclude that Intel’s best leap forward is with a strong 10nm chip rather than a third iteration on 14nm. But this misses a larger issue — one we’ve discussed multiple times over the past few years. As node shrinks become more difficult and the advantages of any given node shrink are less and less potent, it can take longer for a company to deliver meaningful advantages. Intel is still pursuing full node shrinks, unlike its competitors at GlobalFoundries, Samsung, and TSMC. These firms won’t offer equivalent gate lengths or feature sizes to Intel until they deploy their 10nm nodes and aren’t expected to match Intel’s 10nm until they hit 7nm. This is why Intel can still plausibly claim to be ahead on process technology, despite using a higher number to describe it.

Image by Ars Technica

When Intel debuted 14nm, it pushed that technology into ultra-mobile parts first, where the reduction in power consumption and improvement of low-power clock speeds was seen as critical to the company’s ability to compete with ARM. As we’ve recently discussed, the improvements to Intel’s low-power CPUs have been considerably larger than the boosts to desktop performance in an equivalent period of time. AMD, prior to Ryzen, has been stuck in a similar scenario.
We may be arriving at a point where it makes more sense to keep older nodes around and to improve process nodes and architecture over several generations than it does to aggressively transition to each new node. Earlier this year, Mark Papermaster of AMD made comments to suggest that AMD would stick to 14nm for multiple product generations. It’s not clear how this will play out or how aggressively the smaller CPU manufacturer will use the strategy. But we could be seeing a similar play from Intel, which has already deployed 14nm across three families of processors (Broadwell, Skylake, Kaby Lake) and may be prepping desktop Cannon Lake chips for a fourth. Other foundry manufacturers have begun referring to certain nodes as “long-lived” (28nm, 14/16nm, and possibly 7nm) while others (20nm, 10nm) are being described as short-term nodes. This differentiation didn’t used to exist in semiconductor technology and it indirectly speaks to what Intel may be driving at: Some nodes are better than others for certain types of semiconductors.
8th-gen chips on 14nm are now expected in the second half of 2017 rather than the first half of 2018 as had previously been reported. This could mean Intel wants to push new hardware to compete with Ryzen sooner than later.
Intel might defend PAO as a process with an undisclosed number of steps in the “Optimization” portion, rather than a discrete series of changes that was meant to apply to three, and only three, groups of processors. This interpretation is undermined by how Intel raised precisely zero objections last year when the world+dog described PAO as a three-step process compared with the two-stop pendulum model of tick-tock. We may see multiple process nodes gathered together under the 8th Generation Core banner, with ultra-low-power mobile and data center chips moving to 10nm first, while desktop and high-power laptop processors following at a later date.